岗位大厅/Engineering/Analog and Mixed Signal Layout Engineer

Lumilens · 38天前 · 来源 Ashby

Analog and Mixed Signal Layout Engineer

Bengaluru, India办公方式未标注
全职Engineering
薪资未披露
团队 51–200 人

🛡 岗位真实性核验

Ghost Job 检测

🛡 申请链接 核验有效

信号由后台自动核验生成,仅供参考;判断权在你。设计案:GHOST-JOB-P1

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必备技能

AIAutomationCADCadence VirtuosoCmosNetworkingSerDes产品

免费注册后解锁"你的匹配分 vs 高分画像"与个人技能缺口。

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职位描述

ANALOG AND MIXED SIGNAL LAYOUT ENGINEER

ABOUT LUMILENS

At Lumilens, we’re building the critical photonics infrastructure that powers tomorrow’s AI supercomputing. Our technology enables faster, cooler, and more efficient computing through cutting-edge optical solutions and high-performance connectivity IPs. If you’re driven by innovation and eager to shape the future of AI infrastructure, we invite you to join our world-class engineering team.

WHAT YOU CAN EXPECT

- Play a key role in developing high-speed connectivity IPs using advanced semiconductor process technologies.

- Design and implement complex analog, mixed-signal, and RF layouts for high-performance connectivity IPs, including floorplanning, device placement, and routing.

- Work closely with circuit designers to translate schematics into robust physical implementations from floorplanning through tapeout.

- Own physical verification and signoff closure including DRC, LVS, ERC, antenna, DFM, and EMIR.

- Optimize layouts using extraction results to meet performance, matching, noise, and reliability targets.

- Contribute to layout reviews and help drive effective layout methodologies and best practices.

- Improve layout productivity and quality through automation, scripting, and AI-assisted workflows.

- Develop high-performance connectivity IPs used in AI, networking, and next-generation compute systems.

WHAT WE’RE LOOKING FOR

- BE/B.Tech or MS/M.Tech in Electrical/Electronics Engineering, Microelectronics, or a related field with 5–10 years of experience in analog, mixed-signal, RF, or custom layout development.

- Hands-on experience with layouts for SerDes, data converters, clocking circuits, power management, transceiver building blocks, or related connectivity IPs.

- Proven experience in full-custom layout and signoff including RC extraction, DRC, LVS, ERC, DFM, and EMIR.

- Exposure to silicon photonics, co-packaged optics (CPO), near-package optics (NPO), optical transceivers, or high-bandwidth connectivity solutions is a strong plus.

- Experience with advanced semiconductor technologies including CMOS, FinFET, BiCMOS, or SiGe.

- Strong understanding of semiconductor process technologies, device physics, and layout-dependent effects.

- Proficiency with Cadence Virtuoso and industry-standard EDA tools.

- Experience leveraging automation, scripting, or AI-assisted methodologies to improve layout productivity and quality.

- Solid understanding of layout techniques including matching, shielding, clock distribution, power planning, ESD protection, latch-up prevention, manufacturability, and reliability-aware design.

- Demonstrated success delivering complex layouts through tapeout.

- Ability to work effectively with globally distributed design, verification, CAD, and technology teams.

- Experience supporting multiple projects in a fast-paced product development environment.

WHY JOIN LUMILENS?

- Work alongside leaders and innovators in the photonics and semiconductor industry

- Opportunity to make an impact on the infrastructure powering next-generation AI and high-performance computing

- Fast-paced, collaborative, and mission-driven environment

- Competitive compensation and benefits

Join us at Lumilens and help shape the future of compute connectivity!

🈯 翻译这份 JD · 红灯 0 / 黄灯 1 / 绿灯 1点开 ▾
可以投——没有红灯,黄灯问题放进面试清单问清即可。
fast-paced → 流程不成熟、需求常变要问的问题:「节奏快」的交付周期是多久?需求由谁定?
plus → 加分项,不是门槛
词典只标"常见信号",不对公司下结论——红灯 = 面试里该当面确认的问题。想自己翻别的 JD:JD 翻译器 →
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公司 · Company

Lumilens

Telecommunications

Bengaluru, India团队 51–200 人来源:Ashby

⚑ 岗位信息收录自公开招聘页(Ashby),以雇主官网为准