岗位大厅/Engineering/Senior FPGA Design Engineer

Platform Recruitment · 51天前 · 来源 公开招聘平台

Senior FPGA Design Engineer

Pampisford, Cambridge办公方式未标注
全职Engineering
GBP 100,000–160,000
🇬🇧 永居新规 · 快线薪资 £100,000–160,000 ≥£125,140 —— 3 年可申永居(减 7 年)。快线门槛 £50,270 · 签证线 £41,700

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必备技能

FPGARtlSystemVerilog

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职位描述

Senior FPGA Design Engineer | Hybrid | Cambridge Join an innovative technology company developing advanced electronic products used in demanding, high-performance applications. You'll become part of a collaborative engineering team, contributing to the core FPGA technology that powers a range of next-generation products. Responsibilities * Design and develop reusable FPGA modules using SystemVerilog for deployment across multiple products. * Perform RTL verification and support timing closure t…

🈯 翻译这份 JD · 红灯 0 / 黄灯 0 / 绿灯 0点开 ▾
没扫到常见信号词。这份 JD 直白得不常见——面试里照常确认节奏、汇报线和薪酬范围就好。
没扫到常见信号词——这份 JD 直白得不常见。照常确认节奏、汇报线和薪酬范围。
词典只标"常见信号",不对公司下结论——红灯 = 面试里该当面确认的问题。想自己翻别的 JD:JD 翻译器 →
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公司 · Company

Platform Recruitment

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Pampisford, Cambridge来源:公开招聘平台

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