Senior RTL Engineer, FPGA Systems

Pampisford, Cambridge办公方式未标注

全职Engineering

GBP 60,000–80,000

🇬🇧 永居新规 · 达标薪资 £60,000–80,000 ≥快线 £50,270 —— 5 年可申永居（薪资下限已达标）。签证线 £41,700

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必备技能

Backbone.jsC++FPGA

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职位描述

Developing top-end RTL logic, with full FPGA utilisation and performant algorithms This Cambridge technology company are growing their core engineering team; a half dozen senior engineers who collaborate closely on new projects. As a skilled Senior RTL Engineer with FPGA experience, you’d be working alongside peers with similar skills, as well as developers working in C++ and Rust. These technologies interface and form the backbone of a robust, high-speed and integrated solution, for deployment…

🈯 翻译这份 JD · 红灯 0 / 黄灯 0 / 绿灯 0点开 ▾

没扫到常见信号词。这份 JD 直白得不常见——面试里照常确认节奏、汇报线和薪酬范围就好。

没扫到常见信号词——这份 JD 直白得不常见。照常确认节奏、汇报线和薪酬范围。

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公司 · Company

ECM Selection Ltd.

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Pampisford, Cambridge来源：公开招聘平台

⚑ 岗位信息收录自公开招聘页（公开招聘平台），以雇主官网为准