岗位大厅/Engineering/FPGA Engineer - Radar Signal Processing

Harmattan AI · 242天前 · 来源 雇主官网

FPGA Engineer - Radar Signal Processing

Paris现场办公
全职Engineering
薪资未披露
B 轮
团队 51–200 人

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信号由后台自动核验生成,仅供参考;判断权在你。设计案:GHOST-JOB-P1

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必备技能

AIEmbedded SoftwareFPGASignal ProcessingSystemVerilogVHDLVerilog增长

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职位描述

ABOUT US

Harmattan AI is a next-generation defense prime building autonomous and scalable defense systems. Following the close of a $200M Series B, valuing the company at $1.4 billion, we are expanding our teams and capabilities to deliver mission-critical systems to allied forces.

Our work is guided by clear values: building technologies with real-world impact, pursuing excellence in everything we do, setting ambitious goals, and taking on the hardest technical challenges. We operate in a demanding environment where rigor, ownership, and execution are expected.

ABOUT THE ROLE

As an FPGA Radar Engineer, you will help design and implement the real-time radar signal-processing pipeline that powers our drone sensing capabilities. You will work closely with hardware and embedded software engineers and be involved throughout the development cycle, from architecture and RTL implementation to integration and field validation. This role is ideal for an engineer with a strong background in DSP, practical FPGA experience, and a genuine interest in radar systems.

RESPONSIBILITIES

- Develop FPGA-based radar signal-processing pipelines, encompassing key stages such as pulse compression, Range/Doppler processing, CFAR detection, and target tracking handoff.

- Contribute to the RTL implementation of radar waveform generation and reception, including both FMCW and pulsed waveforms.

- Perform system-level radar simulations, including Range-Doppler maps, SNR modeling, clutter analysis, and assessment of detection performance under realistic conditions.

- Write and maintain testbenches and validation frameworks tailored to radar processing chains, enabling rapid debugging and iteration.

- Collaborate closely with RF and hardware engineers to ensure seamless integration between FPGA designs and the radar front end - including antenna, Tx/Rx modules, ADC/DAC interfaces, timing, and synchronization.

- Document the interfaces between the radar processing core, system software, and hardware layers.

CANDIDATE REQUIREMENTS

- Master’s degree (or equivalent) in Electrical Engineering, Signal Processing, Applied Physics, or a related field.

- At least 3 years of hands-on FPGA development experience, including practical work with radar or sonar signal processing (using VHDL and/or Verilog/SystemVerilog).

- Strong working knowledge of radar signal processing fundamentals, including pulse compression, matched filtering, Range-Doppler processing, CFAR, and clutter rejection.

- Familiarity with FMCW and pulsed radar architectures, including waveform generation and digital back-end processing on FPGA.

- Solid foundation in DSP concepts: FFT, FIR/IIR filtering, windowing, fixed-point arithmetic, and precision management.

- Experience with test benches development and hardware-in-the-loop validation.

- Rigorous and collaborative, with the ability to work effectively across hardware, software, and systems teams.

- 100% dedication to Harmattan AI’s mission, vision, and ambitious growth plans, ready to go the extra mile to ensure operational excellence.

We look forward to hearing how you can help shape the future of autonomous defense systems at Harmattan AI.

🈯 翻译这份 JD · 红灯 0 / 黄灯 0 / 绿灯 0点开 ▾
没扫到常见信号词。这份 JD 直白得不常见——面试里照常确认节奏、汇报线和薪酬范围就好。
没扫到常见信号词——这份 JD 直白得不常见。照常确认节奏、汇报线和薪酬范围。
词典只标"常见信号",不对公司下结论——红灯 = 面试里该当面确认的问题。想自己翻别的 JD:JD 翻译器 →
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公司 · Company

Harmattan AI

Harmattan AI operates as a next-generation defense prime designing autonomous, AI-driven tactical systems including unmanned aerial vehicles for intelligence, s

Paris团队 51–200 人B 轮来源:雇主官网

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