1. Operator development and optimization
- Around mainstream hardware architectures such as GPU and NPU, relying on technologies such as CUDA, Ascend C, and TileLang, com……
1. Operator development and optimization - Around mainstream hardware architectures such as GPU and NPU, relying on technologies such as CUDA, Ascend C, and TileLang, complete the research, development, and optimization of core computing and communication operators for large models. - Based on chip storage hierarchy, computing unit, and instruction set characteristics, carry out targeted performance tuning to ensure operator performance accurately matches hardware capabilities and provide efficient computing power support for business. Communication operator research, development, and tuning - For diverse communication scenarios such as cross-card and cross-machine, design, develop, and optimize communication operators to ensure efficient communication links for distributed training and inference. - Continuously perform performance polishing and troubleshooting on mainstream collective communication libraries such as NCCL and HCCL to ensure the communication link is stable and reliable and adapt to large-scale computing power collaboration requirements. 2. Collaboration and optimization - Keep up with model structure and algorithm iteration trends, collaborate with framework and algorithm teams, design model solutions adapted to hardware characteristics, and tap the collaborative potential of hardware and algorithms. - Carry out performance analysis around real training and inference workloads, provide performance optimization support for model deployment, and ensure efficient business operation. 1. Basic requirements - Master's degree or above. - Solid programming foundation, proficient in C++/C, with good awareness of code standards and foundations in data structures and algorithms, and familiar with core operating system principles. - Proficient in using code management tools such as Git, with standardized development habits; proficient in development capabilities under Linux. - Passionate about performance optimization, with both technical vision and pursuit of code quality, good Chinese communication skills, teamwork awareness, sense of responsibility, and self-drive, with outstanding learning ability. 2. Required technical skills - Proficient in programming principles such as CUDA and Ascend C, and able to carry out operator development based on programming languages. - Master compiler optimization technologies, and clearly understand the parallel execution, memory hierarchy, and computing unit characteristics of GPU/NPU architectures. - Proficient in the compilation principles and use of TileLang, Triton, etc., and able to write and optimize core operators. - Have a clear understanding of underlying hardware architecture, and be able to carry out targeted optimization based on hardware characteristics. Bonus points 1. Operator expertise: Experience in CUDA or Ascend C operator development, familiar with operator libraries such as LLM-related operators, and deep understanding of AI accelerator card hardware architecture and characteristics. 2. Competition background: Good results in high-performance computing-related competitions. 3. Industry experience: More than 3 years of operator library optimization experience, dedicated to tapping hardware performance and improving software efficiency.